Event Generator

The Event Generator (EVG) is responsible of creating and sending out timing events to an array of Event Receivers. High configurability makes it feasible to build a whole timing system with a single Event Generator without external counters etc.

Events are sent out by the event generator as serialised event frames (words) consisting of an eight bit event code and an eight bit distributed bus data byte encoded using 8B10B encoding. The event transfer rate, the event clock, is derived from an external RF clock. An on-board fractional synthesizer is provided for testing purposes.

Event Sources

The timing system utilises eight bit event codes i.e. there are 256 codes available. Event code zero is sent out when there is no other code pending. There are several sources of events: trigger events, sequence RAM events, VME events and events received from an upstream Event Generator. Events from different sources have different priority which is resolved in a priority encoder. The different event sources and their priority is listed in the table below.

Priority Event Source
highest Trigger Event 0
Trigger Event 1
Trigger Event 2
Trigger Event 3
Event Sequencer 1
Event Sequencer 2
(Super Sequencer Event, under development for the VME-EVG-230)
Trigger Event 4
Trigger Event 5
Trigger Event 6
Trigger Event 7
Upstream EVG Event
SW Event
Timestamping '0' Event
Timestamping '1' Event
lowest Timestamping Second Event

Trigger Events

There are eight trigger event sources that send out an event code on a stimulus. Each trigger event has its own programmable event code register and various enable bits. The event code transmitted is determined by contents of the corresponding event code register. The stimulus may be a detected rising edge on an external signal or a rising edge of a multiplexed counter output.

Trigger Event 0 has also the option of being triggered by a rising edge of the AC mains voltage synchronization logic signal.

Event Sequencer

Event sequencers provide a method of transmitting or playing back sequences of events stored in random access memory with defined timing. In the event generator there are two event sequencers. The 8-bit event codes are stored in a RAM table each attached with a 32-bit timestamp relative to the start of sequence. Both sequencers can hold up to 2048 event code - timestamp pairs.

Upstream EVG Events

Event Generators may be cascaded. An event code from an upstream EVG is transmitted when there is no higher priority event pending.

Software Events

Software events may be sent out by the IOC controlling the EVG.

Timestamping Events

Timestamping events may be used to transfer the precise real time to all event receivers.